Diraq and Dell test QPU–HPC integration toward hybrid quantum–classical execution

【Article Title】 Diraq and Dell test QPU–HPC integration toward hybrid quantum–classical execution 【Article Body】 AI TRANSLATION This article is an AI-generated translation of the original Japanese article. For the authoritative version, please refer to the original. Read the original Japanese article → (https://quantumindex.jp/diraq-dell-hybrid-quantum-classical-hpc/) Diraq and Dell Technologies are collaborating to integrate quantum processors and high-performance computing (HPC) in a practical, scalable way. Dell has deployed a small HPC cluster at Diraq’s Sydney lab to create an environment for testing low-latency connections and the distribution of compute tasks. ✍️ Quantum Index Analysis We explain the technical and business implications behind the announcement and evaluation points that are not obvious from numbers and headlines alone. Read our original analysis ↓ Announcement summary Dell’s HPC cluster is placed in close physical and network proximity to Diraq’s quantum processors. Initial work will measure connection stability and baseline latency, and verify coordinated operation between the HPC and quantum processorquantum processorQuantum Processor / Quantum Processor / Quantum Processing Unit / QPUThe central part of the hardware that houses qubits and performs quantum computational operations such as quantum gates and measurements.QI NoteThe performance of a QPU cannot be judged by the number of qubits alone. Gate fidelity, connectivity, speed, error rates, and other factors must be considered together. through simple quantum circuits. In addition to hardware connectivity, the companies are working on orchestration that allocates tasks between classical computationclassical computationClassical Computing / Classical Computation / Classical Computing / Classical ComputationA computation method that uses bits of 0 and 1; the form of computation performed by the computers commonly used today.QI NoteUsed as a point of comparison with quantum computing, but it can encompass CPUs, GPUs, supercomputers, and specialized algorithms, so care should be taken about the conditions of comparison. and quantum operations. The plan is to adapt Dell’s technology to handle workload translation, execution ordering, and result collection. Short-term use cases include automated qubitqubitQubit / Quantum Bit / QubitThe basic unit of information in a quantum computer. It can represent not only 0 or 1 but also a quantum state that is a superposition of them.QI NoteHaving more qubits does not necessarily mean higher performance. Error rates, connectivity, coherence time, and the number of logical qubits are also important. calibration and tuning, with an eye toward future applications such as quantum error correctionquantum error correction量子誤り訂正 / Quantum Error Correction / QECA technique that distributes information across multiple physical qubits and detects and corrects errors without directly disturbing the quantum state.QI NoteSimply implementing it does not automatically provide practical fault tolerance. What matters is whether the logical error rate is improved relative to the physical error rate. that require continuous, fast classical processing. Diraq is developing silicon spin qubits that it says are compatible with existing semiconductor foundry processes. The company aims to integrate millions of qubits on a single chip, but timelines and large-scale demonstrations are not included in this announcement. Both companies are considering industries such as drug discovery, logistics, supply chains, financial modeling, and portfolio optimization as candidate applications. The approach is not to replace existing compute infrastructures with quantum computing, but to have quantum processors handle parts of workflows centered on HPC. Key points • Dell has deployed a small HPC cluster at Diraq’s Sydney lab to create a colocated integration environment with the quantum processor • They will verify coordinated operation between HPC and the quantum processor by testing connection stability, baseline latency, and simple quantum circuits • They are developing orchestration capabilities that manage task allocation between classical and quantum computation, execution ordering, and result collection • Near-term targets include automated qubit calibration and tuning, with future application to quantum error correction envisaged • While industrial use cases are being explored, the companies have not published quantitative results demonstrating performance improvements or cost-effectiveness Technical and business implications From a technical perspective, the significance lies in colocating a quantum processor that requires fast feedback with an HPC system and jointly testing communication latency, control, and task management. If quantum computing can be handled in a way similar to existing data center operations, it could make it easier to incorporate QPUs as part of broader compute workflows. From a business perspective, the effort explores how to embed quantum processing into HPC for candidate applications such as drug discovery and optimization. However, application-specific advantages, deployment costs, commercialization timelines, and scalability to millions of qubits have not been demonstrated at this stage. What to watch next Going forward, it will be important to see quantitative results on communication latency and connection stability within the integrated environment. In addition to how well automated qubit calibration works on real hardware, a key question is whether the orchestration can be extended to the continuous processing required by quantum error correction. Also watch for performance and cost-effectiveness data for candidate applications, and for concrete plans toward the large-scale integration Diraq proposes. ✍️ Quantum Index Analysis The important point of this announcement is less about the raw performance of the quantum processorquantum processorQuantum Processor / Quantum Processor / Quantum Processing Unit / QPUThe central part of the hardware that houses qubits and performs quantum computational operations such as quantum gates and measurements.QI NoteThe performance of a QPU cannot be judged by the number of qubits alone. Gate fidelity, connectivity, speed, error rates, and other factors must be considered together. and more that the partners have begun real-world tests of how to integrate a QPU into existing HPC infrastructure and establish a system-level division of labor with classical compute. For quantum computing to become part of practical systems, integration is required not only at the QPU level but also across communication, control, job management, and feedback processing on the classical side. This direction is not unique to Diraq and Dell. RIKEN’s ROQUO project has built a heterogeneous compute platform that performs pre- and post-processing on GPUs/HPC and allocates quantum processing to IBM and Quantinuum QPUs, and research by Cleveland Clinic, RIKEN, and IBM has actually been used in large-scale chemical computation workflows (https://en.quantumindex.jp/cleveland-clinic-riken-ibm-gordon-bell-finalists-2026/). Meanwhile, Quantum Machines has used CUDA-Q and NVQLink to control real qubitsqubitsQubit / Quantum Bit / QubitThe basic unit of information in a quantum computer. It can represent not only 0 or 1 but also a quantum state that is a superposition of them.QI NoteHaving more qubits does not necessarily mean higher performance. Error rates, connectivity, coherence time, and the number of logical qubits are also important., PPUs, GPUs, and CPUs from a single program and demonstrated quantum–classical round trips in about 1 microsecond (https://en.quantumindex.jp/quantum-machines-cuda-q-nvqlink-hybrid-execution/). The competitive axis is therefore broadening from QPU standalone performance to how tightly a QPU can be integrated with CPUs and GPUs. At a lower system layer, Qblox and Riverlane have demonstrated a real-time loop connecting a QEC decoder and quantum control system (https://en.quantumindex.jp/qblox-riverlane-real-time-qec-loop/). Diraq itself, together with Iceberg Quantum, is designing a mapping of the qLDPC codeqLDPC codeQuantum Low-Density Parity-Check Code / Quantum Low-Density Parity-Check Code / Quantum LDPC Code / QLDPC CodeA type of quantum error-correcting code with a sparse structure in which each check acts on only a small number of qubits. It has the potential to correct errors efficiently with a small number of additional qubits.QI NoteWhile they are attracting attention for the possibility of reducing qubit overhead compared to the surface code, practical viability must be evaluated not only by code rate and distance but also by the required connectivity, decoders, and implementation conditions of the error-correction circuits. “Pinnacle” to its silicon spin qubits using CUDA-Q Logical (mapping the Pinnacle qLDPC code to its spin qubits (https://en.quantumindex.jp/diraq-pinnacle-spin-qubits-cuda-q-logical/)). The low-latency HPC integration Dell and Diraq are testing therefore relates not only to current calibration automation but also to where and at what speed the large volumes of classical computationclassical computationClassical Computing / Classical Computation / Classical Computing / Classical ComputationA computation method that uses bits of 0 and 1; the form of computation performed by the computers commonly used today.QI NoteUsed as a point of comparison with quantum computing, but it can encompass CPUs, GPUs, supercomputers, and specialized algorithms, so care should be taken about the conditions of comparison. required for future QECQEC量子誤り訂正 / Quantum Error Correction / QECA technique that distributes information across multiple physical qubits and detects and corrects errors without directly disturbing the quantum state.QI NoteSimply implementing it does not automatically provide practical fault tolerance. What matters is whether the logical error rate is improved relative to the physical error rate. will be handled. That said, the current work with Dell is a validation of connectivity and orchestration using a small HPC cluster; it is not a large-scale application run like ROQUO, does not provide microsecond-scale quantitative results like Quantum Machines, and does not demonstrate a full QEC loop. Candidate applications such as drug discovery, logistics, and finance remain at the exploratory stage, and it has not yet been shown that integrating quantum processing will improve performance or cost-effectiveness compared with classical HPC alone. What to watch for next are not just raw latency numbers but whether that latency together with processing capacityprocessing capacityThroughput / ThroughputA metric indicating the amount of work that can be processed per unit time. In quantum computing, it represents how quickly circuits or jobs can be repeatedly executed, among other things.QI NoteThe definition and units of throughput vary between companies and systems. When comparing, check not only the raw number of executions but also conditions such as circuit size, accuracy, and wait times. can meet the feedback cycles required for automated calibration and QEC, and whether processing across QPU, CPU, and GPU can be automated to a practically useful scale. Ultimately, the project will be judged on whether integrating a QPU into specific HPC workloads can deliver computational value that classical computing alone cannot. NETWORKSee Diraq’s industry network → (/qi-network/) Related articles • PsiQuantum partners with Brookhaven National Laboratory on FTQC algorithms using “Construct” (https://en.quantumindex.jp/psiquantum-brookhaven-construct-partnership/) • IQM to deploy quantum computer for LUMI AI Factory in 2027; plans up to nine logical qubits by 2029 (https://en.quantumindex.jp/iqm-lumi-iq-logical-qubits-staged-deployment/) • Alice & Bob and Hyperion Research outline requirements for HPC–quantum–AI integration, shifting competition from QPU alone to system integration (https://en.quantumindex.jp/alice-bob-hpc-quantum-ai-full-stack-report/) Source Read the original announcement article (https://www.diraq.com/newsdesk/diraq-and-dell-technologies-are-building-a-bridge-between-quantum-and-classical-computing) If you found this article useful, please consider sharing it. ──────────────────── 【AI Evaluation Request】 Evaluate the following article critically, not based on the quality of its writing, but on its **original informational value as a specialist publication**. Do not give a high rating to summaries, paraphrases, explanations of technical terms, or generic observations such as "this will be worth watching" or "the timeline remains uncertain" if they could easily be produced by a general-purpose generative AI, even if they are well written. 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Diraq and Dell Technologies are collaborating to integrate quantum processors and high-performance computing (HPC) in a practical, scalable way. Dell has deployed a small HPC cluster at Diraq’s Sydney lab to create an environment for testing low-latency connections and the distribution of compute tasks.

Announcement summary

Dell’s HPC cluster is placed in close physical and network proximity to Diraq’s quantum processors. Initial work will measure connection stability and baseline latency, and verify coordinated operation between the HPC and quantum processorquantum processorQuantum Processor / Quantum Processor / Quantum Processing Unit / QPUThe central part of the hardware that houses qubits and performs quantum computational operations such as quantum gates and measurements.QI NoteThe performance of a QPU cannot be judged by the number of qubits alone. Gate fidelity, connectivity, speed, error rates, and other factors must be considered together. through simple quantum circuits.

In addition to hardware connectivity, the companies are working on orchestration that allocates tasks between classical computationclassical computationClassical Computing / Classical Computation / Classical Computing / Classical ComputationA computation method that uses bits of 0 and 1; the form of computation performed by the computers commonly used today.QI NoteUsed as a point of comparison with quantum computing, but it can encompass CPUs, GPUs, supercomputers, and specialized algorithms, so care should be taken about the conditions of comparison. and quantum operations. The plan is to adapt Dell’s technology to handle workload translation, execution ordering, and result collection. Short-term use cases include automated qubitqubitQubit / Quantum Bit / QubitThe basic unit of information in a quantum computer. It can represent not only 0 or 1 but also a quantum state that is a superposition of them.QI NoteHaving more qubits does not necessarily mean higher performance. Error rates, connectivity, coherence time, and the number of logical qubits are also important. calibration and tuning, with an eye toward future applications such as quantum error correctionquantum error correction量子誤り訂正 / Quantum Error Correction / QECA technique that distributes information across multiple physical qubits and detects and corrects errors without directly disturbing the quantum state.QI NoteSimply implementing it does not automatically provide practical fault tolerance. What matters is whether the logical error rate is improved relative to the physical error rate. that require continuous, fast classical processing.

Diraq is developing silicon spin qubits that it says are compatible with existing semiconductor foundry processes. The company aims to integrate millions of qubits on a single chip, but timelines and large-scale demonstrations are not included in this announcement.

Both companies are considering industries such as drug discovery, logistics, supply chains, financial modeling, and portfolio optimization as candidate applications. The approach is not to replace existing compute infrastructures with quantum computing, but to have quantum processors handle parts of workflows centered on HPC.

Key points

• Dell has deployed a small HPC cluster at Diraq’s Sydney lab to create a colocated integration environment with the quantum processor
• They will verify coordinated operation between HPC and the quantum processor by testing connection stability, baseline latency, and simple quantum circuits
• They are developing orchestration capabilities that manage task allocation between classical and quantum computation, execution ordering, and result collection
• Near-term targets include automated qubit calibration and tuning, with future application to quantum error correction envisaged
• While industrial use cases are being explored, the companies have not published quantitative results demonstrating performance improvements or cost-effectiveness

Technical and business implications

From a technical perspective, the significance lies in colocating a quantum processor that requires fast feedback with an HPC system and jointly testing communication latency, control, and task management. If quantum computing can be handled in a way similar to existing data center operations, it could make it easier to incorporate QPUs as part of broader compute workflows. From a business perspective, the effort explores how to embed quantum processing into HPC for candidate applications such as drug discovery and optimization. However, application-specific advantages, deployment costs, commercialization timelines, and scalability to millions of qubits have not been demonstrated at this stage.

What to watch next

Going forward, it will be important to see quantitative results on communication latency and connection stability within the integrated environment. In addition to how well automated qubit calibration works on real hardware, a key question is whether the orchestration can be extended to the continuous processing required by quantum error correction. Also watch for performance and cost-effectiveness data for candidate applications, and for concrete plans toward the large-scale integration Diraq proposes.

✍️ Quantum Index Analysis

The important point of this announcement is less about the raw performance of the quantum processorquantum processorQuantum Processor / Quantum Processor / Quantum Processing Unit / QPUThe central part of the hardware that houses qubits and performs quantum computational operations such as quantum gates and measurements.QI NoteThe performance of a QPU cannot be judged by the number of qubits alone. Gate fidelity, connectivity, speed, error rates, and other factors must be considered together. and more that the partners have begun real-world tests of how to integrate a QPU into existing HPC infrastructure and establish a system-level division of labor with classical compute. For quantum computing to become part of practical systems, integration is required not only at the QPU level but also across communication, control, job management, and feedback processing on the classical side.

This direction is not unique to Diraq and Dell. RIKEN’s ROQUO project has built a heterogeneous compute platform that performs pre- and post-processing on GPUs/HPC and allocates quantum processing to IBM and Quantinuum QPUs, and research by Cleveland Clinic, RIKEN, and IBM has actually been used in large-scale chemical computation workflows. Meanwhile, Quantum Machines has used CUDA-Q and NVQLink to control real qubitsqubitsQubit / Quantum Bit / QubitThe basic unit of information in a quantum computer. It can represent not only 0 or 1 but also a quantum state that is a superposition of them.QI NoteHaving more qubits does not necessarily mean higher performance. Error rates, connectivity, coherence time, and the number of logical qubits are also important., PPUs, GPUs, and CPUs from a single program and demonstrated quantum–classical round trips in about 1 microsecond. The competitive axis is therefore broadening from QPU standalone performance to how tightly a QPU can be integrated with CPUs and GPUs.

At a lower system layer, Qblox and Riverlane have demonstrated a real-time loop connecting a QEC decoder and quantum control system. Diraq itself, together with Iceberg Quantum, is designing a mapping of the qLDPC codeqLDPC codeQuantum Low-Density Parity-Check Code / Quantum Low-Density Parity-Check Code / Quantum LDPC Code / QLDPC CodeA type of quantum error-correcting code with a sparse structure in which each check acts on only a small number of qubits. It has the potential to correct errors efficiently with a small number of additional qubits.QI NoteWhile they are attracting attention for the possibility of reducing qubit overhead compared to the surface code, practical viability must be evaluated not only by code rate and distance but also by the required connectivity, decoders, and implementation conditions of the error-correction circuits. “Pinnacle” to its silicon spin qubits using CUDA-Q Logical (mapping the Pinnacle qLDPC code to its spin qubits). The low-latency HPC integration Dell and Diraq are testing therefore relates not only to current calibration automation but also to where and at what speed the large volumes of classical computationclassical computationClassical Computing / Classical Computation / Classical Computing / Classical ComputationA computation method that uses bits of 0 and 1; the form of computation performed by the computers commonly used today.QI NoteUsed as a point of comparison with quantum computing, but it can encompass CPUs, GPUs, supercomputers, and specialized algorithms, so care should be taken about the conditions of comparison. required for future QECQEC量子誤り訂正 / Quantum Error Correction / QECA technique that distributes information across multiple physical qubits and detects and corrects errors without directly disturbing the quantum state.QI NoteSimply implementing it does not automatically provide practical fault tolerance. What matters is whether the logical error rate is improved relative to the physical error rate. will be handled.

That said, the current work with Dell is a validation of connectivity and orchestration using a small HPC cluster; it is not a large-scale application run like ROQUO, does not provide microsecond-scale quantitative results like Quantum Machines, and does not demonstrate a full QEC loop. Candidate applications such as drug discovery, logistics, and finance remain at the exploratory stage, and it has not yet been shown that integrating quantum processing will improve performance or cost-effectiveness compared with classical HPC alone.

What to watch for next are not just raw latency numbers but whether that latency together with processing capacityprocessing capacityThroughput / ThroughputA metric indicating the amount of work that can be processed per unit time. In quantum computing, it represents how quickly circuits or jobs can be repeatedly executed, among other things.QI NoteThe definition and units of throughput vary between companies and systems. When comparing, check not only the raw number of executions but also conditions such as circuit size, accuracy, and wait times. can meet the feedback cycles required for automated calibration and QEC, and whether processing across QPU, CPU, and GPU can be automated to a practically useful scale. Ultimately, the project will be judged on whether integrating a QPU into specific HPC workloads can deliver computational value that classical computing alone cannot.

NETWORKSee Diraq’s industry network →

Related articles

• PsiQuantum partners with Brookhaven National Laboratory on FTQC algorithms using “Construct”
• IQM to deploy quantum computer for LUMI AI Factory in 2027; plans up to nine logical qubits by 2029
• Alice & Bob and Hyperion Research outline requirements for HPC–quantum–AI integration, shifting competition from QPU alone to system integration

Source

Read the original announcement article