Riverlane accelerates QEC decoder recalibration 65× on NVIDIA GPUs, halves logical error rate

【Article Title】 Riverlane accelerates QEC decoder recalibration 65× on NVIDIA GPUs, halves logical error rate 【Article Body】 AI TRANSLATION This article is an AI-generated translation of the original Japanese article. For the authoritative version, please refer to the original. Read the original Japanese article → (https://quantumindex.jp/riverlane-gpu-qec-decoder-recalibration/) Riverlane has accelerated the recalibration of quantum error correctionquantum error correction量子誤り訂正 / Quantum Error Correction / QECA technique that distributes information across multiple physical qubits and detects and corrects errors without directly disturbing the quantum state.QI NoteSimply implementing it does not automatically provide practical fault tolerance. What matters is whether the logical error rate is improved relative to the physical error rate. (QEC) decoder weights using GPUs. Using a single NVIDIA H100, it reduced a single training epoch for the surface codesurface codeSurface Code / Surface Code / Surface Quantum Error-Correcting CodeA representative quantum error-correcting code that arranges qubits on a lattice and detects and corrects errors by repeatedly performing local measurements.QI NoteIt is regarded as promising because it is relatively easy to implement, but the required number of physical qubits varies greatly depending on error rates, code distance, and other factors. In company announcements, it is important to confirm the assumptions behind “how many physical qubits make one logical qubit.” from about 3 minutes on a single CPU core to 2.8 seconds. ✍️ Quantum Index Analysis We explain the technical and business significance behind the announcement and the evaluation points that numbers and headlines alone may not reveal. Read our independent analysis ↓ Summary of the announcement Graph‑based QEC decoders use the error probabilities occurring on the quantum processorquantum processorQuantum Processor / Quantum Processor / Quantum Processing Unit / QPUThe central part of the hardware that houses qubits and performs quantum computational operations such as quantum gates and measurements.QI NoteThe performance of a QPU cannot be judged by the number of qubits alone. Gate fidelity, connectivity, speed, error rates, and other factors must be considered together. as weights. Because qubitqubitQubit / Quantum Bit / QubitThe basic unit of information in a quantum computer. It can represent not only 0 or 1 but also a quantum state that is a superposition of them.QI NoteHaving more qubits does not necessarily mean higher performance. Error rates, connectivity, coherence time, and the number of logical qubits are also important. noise characteristics vary over time, it is necessary to recalibrate weights between experiments to reduce mismatch with the actual state. Riverlane moved the Local Clustering Decoder (LCD) decoding workload onto an NVIDIA H100 and processed many syndromes in parallel. For the surface code it processed about 4.2 million syndromes per second, achieving 71× performance versus a single CPU core which handled about 59,000 per second. Across a full training epoch the speedup was 65× for the surface code and 43× for the repetition code. For recalibration, Riverlane used a small distance‑5 code as a sensor and applied multi‑agent reinforcement learning to search for weights that reduce the logical error rate (LER). With the learned weights, LER decreased by a few percent up to at most half compared with the initial prior distribution. Key points • Reduced a single surface‑code training epoch from about 3 minutes on a single CPU core to 2.8 seconds on an NVIDIA H100 • Overall training‑epoch speedup: 65× for the surface code, 43× for the repetition code • Surface‑code decoding throughputthroughputThroughput / ThroughputA metric indicating the amount of work that can be processed per unit time. In quantum computing, it represents how quickly circuits or jobs can be repeatedly executed, among other things.QI NoteThe definition and units of throughput vary between companies and systems. When comparing, check not only the raw number of executions but also conditions such as circuit size, accuracy, and wait times. about 4.2 million syndromes per second, a 71× improvement over a single CPU core • Repetition code throughput about 155 million syndromes per second, a 121× improvement over a single CPU core • Recalibrated weights reduced logical error rate by a few percent up to a maximum of half versus the initial prior distribution Technical and business implications On the technical side, this demonstrates the potential to perform decoder weight recalibration quickly to reduce the lag between calibration data acquisition and experiment start, adapting to noise fluctuations. It also means more training can be carried out in the same wall‑clock time while minimizing QPU idle time. On the business side, the work presents a concrete use case—weight optimization for QEC—for GPUs and HPC infrastructure colocated with quantum computers. Riverlane envisions a heterogeneous architecture as a future QEC stack that combines GPU‑based learning and optimization with real‑time processing via systems like Deltaflow. The announcement does not, however, present figures for operational cost, power consumption, or performance on large‑scale QPUs. What to watch next The next decision factors will be whether improvements in logical error rate from recalibration hold for larger codes and on quantum hardware with time‑varying noise. The cost and power implications of using GPUs, and the effect on QPU idle time during continuous operation, will also be important. Additionally, it will be worth watching how learning workloads and real‑time decoding are apportioned between GPUs and dedicated QEC systems like Deltaflow in deployed configurations. ✍️ Quantum Index Analysis The significant points in this announcement are not only the 65× speedup of GPU‑based training, but also that optimizing decoder weights reduced the logical error rate (LER) by up to half. Because quantum hardware noise characteristics change over time, decoders must be recalibrated to match the machine. This result shows that adjusting weights alone—without changing the decoding algorithm—can improve logical performance. Efforts to use GPUs for QECQEC量子誤り訂正 / Quantum Error Correction / QECA technique that distributes information across multiple physical qubits and detects and corrects errors without directly disturbing the quantum state.QI NoteSimply implementing it does not automatically provide practical fault tolerance. What matters is whether the logical error rate is improved relative to the physical error rate. are expanding. Alice & Bob tested GPU acceleration for decoding (https://en.quantumindex.jp/alice-bob-ldpc-cat-gpu-decoding-nvqlink/), and Infleqtion (https://en.quantumindex.jp/infleqtion-qldpc-cuda-q-logical-integration/) and Iceberg Quantum and Diraq (https://en.quantumindex.jp/diraq-pinnacle-spin-qubits-cuda-q-logical/) are using NVIDIA’s CUDA‑Q Logical for QEC code design, compilation, and resource estimation. Riverlane’s work applies GPUs to a different stage—the learning and recalibration of decoders—indicating NVIDIA technology is being adopted across design, decoding, and calibration domains of quantum error correction. However, the 65× figure is a comparison to a single CPU core; versus a 32‑core CPU the speedup shrinks to about 3×. Likewise, the reported up‑to‑half reduction in logical error rate is relative to the initial settings and does not directly demonstrate superiority over other recalibration methods. It remains to be validated how well results obtained on a small distance‑5 code generalize to larger codes and to real hardware with time‑varying noise. From a business perspective, Riverlane’s collaboration with Infleqtion on real‑time QEC integration (https://en.quantumindex.jp/infleqtion-riverlane-qec-neutral-atom-mou/) is noteworthy. The GPU recalibration technique has not been announced as adopted by Infleqtion, but Riverlane envisages combining real‑time processing on the dedicated Deltaflow system with GPU‑based learning and optimization. This suggests a heterogeneous approach—allocating workloads between GPUs, FPGAs, and ASICs depending on processing characteristics—rather than running all classical processing solely on GPUs. As competition around the classical infrastructure for quantum computers intensifies—see Quantum Index’s coverage of NVIDIA and AMD (https://en.quantumindex.jp/quantum-classical-infrastructure-nvidia-amd/)—NVIDIA’s presence grows while specialist QEC companies like Riverlane retain distinct roles. Moving forward, it will be crucial to reproduce short recalibration times and LER improvements in continuous operation on real systems and in large‑scale QEC deployments. Performance, power consumption, and operational cost when integrating GPU learning with dedicated real‑time hardware will be key evaluation metrics for practical adoption. NETWORKSee Riverlane’s industry network → (/qi-network/) Related articles • Who will control the classical side of quantum computers? The infrastructure race through NVIDIA and AMD (https://en.quantumindex.jp/quantum-classical-infrastructure-nvidia-amd/) • Diraq aims to run millions of qubits at 300 kW — a power‑efficient plan for silicon spin quantum computing (https://en.quantumindex.jp/diraq-quantum-system-power-target/) • Infleqtion: what does a “5× QEC improvement” mean? Interpreting reports of low‑latency, low‑overhead, and high‑rate codes (https://en.quantumindex.jp/infleqtion-qldpc-cuda-q-logical-integration/) Sources Read the original announcement (https://www.riverlane.com/news/faster-decoder-recalibration-for-quantum-error-correction) If you found this article useful, please consider sharing it. ──────────────────── 【AI Evaluation Request】 Evaluate the following article critically, not based on the quality of its writing, but on its **original informational value as a specialist publication**. Do not give a high rating to summaries, paraphrases, explanations of technical terms, or generic observations such as "this will be worth watching" or "the timeline remains uncertain" if they could easily be produced by a general-purpose generative AI, even if they are well written. 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Riverlane has accelerated the recalibration of quantum error correctionquantum error correction量子誤り訂正 / Quantum Error Correction / QECA technique that distributes information across multiple physical qubits and detects and corrects errors without directly disturbing the quantum state.QI NoteSimply implementing it does not automatically provide practical fault tolerance. What matters is whether the logical error rate is improved relative to the physical error rate. (QEC) decoder weights using GPUs. Using a single NVIDIA H100, it reduced a single training epoch for the surface codesurface codeSurface Code / Surface Code / Surface Quantum Error-Correcting CodeA representative quantum error-correcting code that arranges qubits on a lattice and detects and corrects errors by repeatedly performing local measurements.QI NoteIt is regarded as promising because it is relatively easy to implement, but the required number of physical qubits varies greatly depending on error rates, code distance, and other factors. In company announcements, it is important to confirm the assumptions behind “how many physical qubits make one logical qubit.” from about 3 minutes on a single CPU core to 2.8 seconds.

Summary of the announcement

Graph‑based QEC decoders use the error probabilities occurring on the quantum processorquantum processorQuantum Processor / Quantum Processor / Quantum Processing Unit / QPUThe central part of the hardware that houses qubits and performs quantum computational operations such as quantum gates and measurements.QI NoteThe performance of a QPU cannot be judged by the number of qubits alone. Gate fidelity, connectivity, speed, error rates, and other factors must be considered together. as weights. Because qubitqubitQubit / Quantum Bit / QubitThe basic unit of information in a quantum computer. It can represent not only 0 or 1 but also a quantum state that is a superposition of them.QI NoteHaving more qubits does not necessarily mean higher performance. Error rates, connectivity, coherence time, and the number of logical qubits are also important. noise characteristics vary over time, it is necessary to recalibrate weights between experiments to reduce mismatch with the actual state. Riverlane moved the Local Clustering Decoder (LCD) decoding workload onto an NVIDIA H100 and processed many syndromes in parallel. For the surface code it processed about 4.2 million syndromes per second, achieving 71× performance versus a single CPU core which handled about 59,000 per second. Across a full training epoch the speedup was 65× for the surface code and 43× for the repetition code. For recalibration, Riverlane used a small distance‑5 code as a sensor and applied multi‑agent reinforcement learning to search for weights that reduce the logical error rate (LER). With the learned weights, LER decreased by a few percent up to at most half compared with the initial prior distribution.

Key points

• Reduced a single surface‑code training epoch from about 3 minutes on a single CPU core to 2.8 seconds on an NVIDIA H100
• Overall training‑epoch speedup: 65× for the surface code, 43× for the repetition code
• Surface‑code decoding throughputthroughputThroughput / ThroughputA metric indicating the amount of work that can be processed per unit time. In quantum computing, it represents how quickly circuits or jobs can be repeatedly executed, among other things.QI NoteThe definition and units of throughput vary between companies and systems. When comparing, check not only the raw number of executions but also conditions such as circuit size, accuracy, and wait times. about 4.2 million syndromes per second, a 71× improvement over a single CPU core
• Repetition code throughput about 155 million syndromes per second, a 121× improvement over a single CPU core
• Recalibrated weights reduced logical error rate by a few percent up to a maximum of half versus the initial prior distribution

Technical and business implications

On the technical side, this demonstrates the potential to perform decoder weight recalibration quickly to reduce the lag between calibration data acquisition and experiment start, adapting to noise fluctuations. It also means more training can be carried out in the same wall‑clock time while minimizing QPU idle time. On the business side, the work presents a concrete use case—weight optimization for QEC—for GPUs and HPC infrastructure colocated with quantum computers. Riverlane envisions a heterogeneous architecture as a future QEC stack that combines GPU‑based learning and optimization with real‑time processing via systems like Deltaflow. The announcement does not, however, present figures for operational cost, power consumption, or performance on large‑scale QPUs.

What to watch next

The next decision factors will be whether improvements in logical error rate from recalibration hold for larger codes and on quantum hardware with time‑varying noise. The cost and power implications of using GPUs, and the effect on QPU idle time during continuous operation, will also be important. Additionally, it will be worth watching how learning workloads and real‑time decoding are apportioned between GPUs and dedicated QEC systems like Deltaflow in deployed configurations.

✍️ Quantum Index Analysis

The significant points in this announcement are not only the 65× speedup of GPU‑based training, but also that optimizing decoder weights reduced the logical error rate (LER) by up to half. Because quantum hardware noise characteristics change over time, decoders must be recalibrated to match the machine. This result shows that adjusting weights alone—without changing the decoding algorithm—can improve logical performance.

Efforts to use GPUs for QECQEC量子誤り訂正 / Quantum Error Correction / QECA technique that distributes information across multiple physical qubits and detects and corrects errors without directly disturbing the quantum state.QI NoteSimply implementing it does not automatically provide practical fault tolerance. What matters is whether the logical error rate is improved relative to the physical error rate. are expanding. Alice & Bob tested GPU acceleration for decoding, and Infleqtion and Iceberg Quantum and Diraq are using NVIDIA’s CUDA‑Q Logical for QEC code design, compilation, and resource estimation. Riverlane’s work applies GPUs to a different stage—the learning and recalibration of decoders—indicating NVIDIA technology is being adopted across design, decoding, and calibration domains of quantum error correction.

However, the 65× figure is a comparison to a single CPU core; versus a 32‑core CPU the speedup shrinks to about 3×. Likewise, the reported up‑to‑half reduction in logical error rate is relative to the initial settings and does not directly demonstrate superiority over other recalibration methods. It remains to be validated how well results obtained on a small distance‑5 code generalize to larger codes and to real hardware with time‑varying noise.

From a business perspective, Riverlane’s collaboration with Infleqtion on real‑time QEC integration is noteworthy. The GPU recalibration technique has not been announced as adopted by Infleqtion, but Riverlane envisages combining real‑time processing on the dedicated Deltaflow system with GPU‑based learning and optimization. This suggests a heterogeneous approach—allocating workloads between GPUs, FPGAs, and ASICs depending on processing characteristics—rather than running all classical processing solely on GPUs.

As competition around the classical infrastructure for quantum computers intensifies—see Quantum Index’s coverage of NVIDIA and AMD—NVIDIA’s presence grows while specialist QEC companies like Riverlane retain distinct roles. Moving forward, it will be crucial to reproduce short recalibration times and LER improvements in continuous operation on real systems and in large‑scale QEC deployments. Performance, power consumption, and operational cost when integrating GPU learning with dedicated real‑time hardware will be key evaluation metrics for practical adoption.

NETWORKSee Riverlane’s industry network →

Related articles

• Who will control the classical side of quantum computers? The infrastructure race through NVIDIA and AMD
• Diraq aims to run millions of qubits at 300 kW — a power‑efficient plan for silicon spin quantum computing
• Infleqtion: what does a “5× QEC improvement” mean? Interpreting reports of low‑latency, low‑overhead, and high‑rate codes

Sources

Read the original announcement