IBM and AMD build live quantum error‑correction research platform to support Starling in 2029
An IBM quantum processor is colocated with ORNL’s HPC equipped with AMD GPUs and CPUs to validate low‑latency quantum error‑correction processing.
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Quantinuum unveils Nexus roadmap to unify development environment through Apollo (2029)
Plans to automate error correction and quantum–classical integration in stages, aiming for a unified development environment from Helios to Apollo (planned 2029).
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Universal Quantum unveils scalable ion‑trap iQPU chip, deployment boosted by major German contract
Integrates over 400 mm² of computational area with control circuitry and inter‑chip connectivity to enable expansion of quantum computers via multiple chips.
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Alice & Bob estimate 22,593 physical qubits to break RSA‑2048; comparison with IonQ highlights FTQC design differences
They published resource estimates for Shor’s algorithm using cat qubits and LDPC‑cat codes, estimating RSA‑2048 could be broken in 3.14 days.
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SEEQC and NVIDIA simulation shows ~50% cut in QEC latency and logical error rate
Combining SEEQC’s chip-based pre-decoder with NVIDIA Ising, simulations reduced decoding latency and logical error rate by about 50%.
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Nord Quantique secures $10M DARPA Stage B extension to continue evaluating bosonic quantum error correction
Nord Quantique has won additional DARPA funding under the Quantum Benchmarking Initiative to continue evaluating and developing its bosonic quantum error‑correction approach.
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IBM demonstrates 99% quantum state-transfer fidelity between processors, advancing modular FTQC
IBM connected two superconducting quantum processors with four l-couplers, demonstrating an average 99% quantum state-transfer fidelity.
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OptQC proposes modular photonic FTQC separating error-correction resources from logical operations
OptQC has published an arXiv paper proposing a photonic quantum-computing architecture that separates the offline resource-generation unit for error correction from the online computation unit.
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Qblox demonstrates low-latency NVQLink connection to NVIDIA DGX Spark, expands control platform after Riverlane QEC demo
Qblox integrated an NVIDIA DGX Spark with its quantum system controller via NVQLink, incorporating GPUs into the quantum control real-time loop.
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Universal Quantum refines decoding for error correction, cuts logical error rate up to 15-fold
They developed a method to iteratively correct correlated errors arising in cross-logical-qubit operations for trapped-ion systems, and compared logical error rates in large-scale simulations.
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Alice & Bob demonstrate key error‑correction operations with cat qubits; logical error rate remains above threshold
In the first phase of France’s PROQCIMA program, they tested cat‑qubit CNOT gates and a distance‑3 repetition code on hardware. The logical error rate remains above the error‑correction threshold.
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Quantinuum hits 99.9995% logical fidelity on Helios, partly ahead of Sol targets
Quantinuum recorded five logical errors per one million operations on its trapped‑ion quantum computer Helios using the color code.
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Google demonstrates magic-state cultivation on Willow, cutting logical errors ~40× and achieving 99.99% T-state fidelity
Google Quantum AI demonstrated magic-state cultivation on the Willow quantum processor, achieving 99.99% logical fidelity for T states.
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Diraq says commercial quantum value should be measured by cost per logical operation
Diraq says quantum computers should be evaluated not by qubit count but by logical-operation throughput and cost per operation.
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Riverlane accelerates QEC decoder recalibration 65× on NVIDIA GPUs, halves logical error rate
Riverlane re‑calibrated QEC decoder weights on GPUs, speeding a surface‑code training epoch 65× versus a single CPU core.
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Alice & Bob test LDPC‑cat quantum error correction on NVIDIA GPUs, raising classical‑compute questions for cat qubit competitiveness
Alice & Bob performed a proof‑of‑concept decoding of LDPC‑cat codes on a GPU via NVIDIA NVQLink. The test used synthetic data and did not achieve real‑time decoding.
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Atom Computing moves to DARPA final verification, citing 1,200+ qubits and commercialization challenges
A neutral-atom approach to utility-scale quantum computing will undergo independent verification by DARPA.
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IBM opens error-mitigation ‘black box’ with directed execution, unifying mitigation and QEC
IBM Quantum announced a new execution model, directed execution. The new primitive, Executor, lets clients inspect and modify error mitigation and circuit randomization from the client side.
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D-Wave launches beta of gate-model quantum simulator, preceding dual-rail hardware
D-Wave has launched a beta program for a gate-model quantum simulator based on dual-rail superconducting technology. Four organizations will develop applications with an eye toward future hardware.
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Classiq unveils Fault Tolerance Engine to turn FTQC resource estimates into execution plans
Classiq has announced its Fault Tolerance Engine, which plans qubit placement and routing and estimates the physical resources required for fault-tolerant quantum computing.
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Alice & Bob and ENS Lyon demonstrate DC-controlled higher-order photon exchange toward four-component cat qubits
Alice & Bob and ENS Lyon demonstrated a method to control two-photon dissipation in superconducting cat qubits using a tiny DC voltage instead of microwave drives.
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Who will control the classical side of quantum computing? NVIDIA’s CUDA‑Q/NVQLink vs AMD and Xanadu’s Backline
Competition in quantum computing won’t be decided by QPU performance alone. As QEC, real‑time control, and hybrid computation increase the need for low‑latency feedback between QPUs and classical systems, NVIDIA is expanding an integrated stack around CUDA‑Q and NVQLink, while AMD and Xanadu counter with the open heterogeneous platform Backline. Will QPU vendors or platform companies that bind QPUs together lead the quantum computing infrastructure?
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Infleqtion and Riverlane sign MOU to integrate qLDPC, Sqale and real-time QEC for fault-tolerant quantum computing
Infleqtion and Riverlane have signed a memorandum of understanding to evaluate integrating real-time quantum error correction with Infleqtion’s neutral-atom quantum computing platform.
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Diraq targets ~300 kW for million‑qubit silicon‑spin quantum system
Diraq has designed an 8‑qubit system being deployed in a commercial data center to run under 20 kW. For a future million‑qubit‑scale system, it assumes about 300 kW including classical compute components.
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QUDORA-led NFQC-1k aims for 1,000 physical and 50 logical qubits in €122M, five-year plan
A seven-organization consortium led by QUDORA aims to build a trapped-ion demonstrator with more than 1,000 physical qubits and a QPU pilot line. The total project size is about €122 million.
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Photonic and Microsoft advance resource estimation for distributed quantum computers, preparing benchmarks for multi‑QPU era
They will jointly evaluate how the configuration of distributed quantum systems and error‑correction schemes affect required physical qubit counts, execution time, and system‑wide load.
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IonQ runs real-time error decoding on single CPU for simulated 408 logical qubits
IonQ evaluated real-time error decoding on a single CPU using circuits simulating up to 408 logical qubits and more than 31.5 million quantum operations. The reported increase in execution time was as little as 0.02%.
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Riverlane to open U.S. headquarters in Maryland, partners with UMD on quantum error correction
Riverlane plans to establish a U.S. headquarters with labs in Maryland and advance quantum error correction research and talent development in partnership with the University of Maryland.
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Diraq and Dell test QPU–HPC integration toward hybrid quantum–classical execution
Diraq and Dell Technologies are colocating quantum processors with HPC systems to test low-latency connections and hybrid computation control techniques.
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Alice & Bob, CEA to integrate cat qubits into HPC and study FTQC algorithms toward 2030
Alice & Bob and CEA have begun work to integrate software for cat qubits into HPC environments and to research many-body algorithms aimed at early fault-tolerant quantum computing.
