SEEQC and NVIDIA simulation shows ~50% cut in QEC latency and logical error rate
Combining SEEQC’s chip-based pre-decoder with NVIDIA Ising, simulations reduced decoding latency and logical error rate by about 50%.
Combining SEEQC’s chip-based pre-decoder with NVIDIA Ising, simulations reduced decoding latency and logical error rate by about 50%.